M41ST87Y Description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1.
M41ST87Y Key Features
- 5.0, 3.3, or 3.0 V operation 400 kHz I2C bus NVRAM supervisor to non-volatize external LPSRAM 2.5 to 5.5 V oscillator op
- 13 Start data transfer
- 13 Stop data transfer
- 13 Data valid
- 13 Acknowledge
- 15 WRITE mode
- 17 Data retention mode
- 17 Tamper detection circuit
- 18 Tamper register bits (tamper 1 and tamper 2)