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STMicroelectronics Electronic Components Datasheet

M89K Datasheet

In-System Programmable ISP Multiple-Memory and Logic FLASHPSD Systems for MCUs

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M89K pdf
M89 FAMILY
In-System Programmable (ISP)
Multiple-Memory and Logic FLASH+PSD Systems for MCUs
DATA BRIEFING
s Single Supply Voltage:
– 5 V±10% for M89xxFxY
– 3 V (+20/–10%) for M89xxFxW
s 1 or 2 Mbit of Primary Flash Memory (8 uniform
sectors, 16K x 8, or 32K x 8)
s A second non-volatile memory:
– 256 Kbit (32K x 8) EEPROM (for M8913F1x)
or Flash memory (for M89x3F2x)
– 4 uniform sectors (8K x 8)
s SRAM (16 Kbit, 2K x 8; or 64 Kbit, 8K x 8)
s Over 2,000 Gates of PLD: DPLD and GPLD
s 27 Reconfigurable I/O ports
s Enhanced JTAG Serial Port
s Programmable power management
s Stand-by current:
– 50 µA for M89xxFxY
– 25 µA for M89xxFxW
s High Endurance:
– 100,000 Erase/Write Cycles of Flash Memory
– 10,000 Erase/Write Cycles of EEPROM
– 1,000 Erase/Write Cycles of PLD
PQFP52 (T)
PLCC52 (K)
Figure 1. Logic Diagram
VCC
Table 1. Signal Names
PA0-PA7
Port-A
PB0-PB7
Port-B
PC0-PC7
Port-C
PC2 = Voltage Stand-by
PD0-PD2
Port-D
AD0-AD15
Address/Data
CNTL0-CNTL2
Control
RESET
Reset
VCC Supply Voltage
VSS Ground
8
PA0-PA7
3
CNTL0-
CNTL2
16
AD0-AD15
FLASH+PSD
8
PB0-PB7
8
PC0-PC7
RESET
3
PD0-PD2
VSS
AI02856
June 2000
Complete data available on Data-on-Disc CD-ROM or at www.st.com
1/7


STMicroelectronics Electronic Components Datasheet

M89K Datasheet

In-System Programmable ISP Multiple-Memory and Logic FLASHPSD Systems for MCUs

No Preview Available !

M89K pdf
M89 FAMILY
Figure 2A. PLCC Connections
Figure 2B. PQFP Connections
PD2
PD1
PD0
PC7
PC6
PC5
PC4
VCC
GND
PC3
PC2
PC1
PC0
8
9
10
11
12
13
14
15
16
17
18
19
20
46 AD15
45 AD14
44 AD13
43 AD12
42 AD11
41 AD10
40 AD9
39 AD8
38 VCC
37 AD7
36 AD6
35 AD5
34 AD4
AI02857
PD2 1
PD1 2
PD0 3
PC7 4
PC6 5
PC5 6
PC4 7
VCC 8
GND 9
PC3 10
PC2 11
PC1 12
PC0 13
39 AD15
38 AD14
37 AD13
36 AD12
35 AD11
34 AD10
33 AD9
32 AD8
31 VCC
30 AD7
29 AD6
28 AD5
27 AD4
AI02858
DESCRIPTION
The FLASH+PSD family of memory systems for
microcontrollers (MCUs) brings In-System-
Programmability (ISP) to Flash memory and
programmable logic. The result is a simple and
flexible solution for embedded designs.
FLASH+PSD devices combine many of the
peripheral functions found in MCU based
applications. FLASH+PSD provides a glueless
interface to most commonly-used ROMless
MCUs.
Table 2 summarizes all the devices in the M89
Family.
The FLASH+PSD device includes a JTAG Serial
Programming interface, to allow In-System
Programming (ISP) of the entire device. This
feature reduces development time, simplifies the
manufacturing flow, and dramatically lowers the
cost of field upgrades. Using ST’s special Fast-
JTAG programming, a design can be rapidly
programmed into the FLASH+PSD.
The innovative FLASH+PSD family solves key
problems faced by designers when managing
discrete Flash memory devices, such as:
– Complex address decoding
– In-System (first-time) Programming (ISP)
– Concurrent EEPROM or Flash memory
programming (IAP).
The JTAG Serial Interface block allows In-System
Programming (ISP). Embedded dual-bank
memories eliminates the need for an external Boot
Table 2. Product Range1
Part Number
Primary Flash
Memory
Secondary NVM SRAM2 I/O Ports Voltage Range Access Time
M8913F1Y
M8913F2Y
M8934F2Y
1 Mbit
1 Mbit
2 Mbit
256 Kbit EEPROM 16 Kbit
256 Kbit Flash memory 16 Kbit
256 Kbit Flash memory 64 Kbit
27
27
27
4.5-5.5 V
90 ns or
150 ns
M8913F1W
1 Mbit
256 Kbit EEPROM 16 Kbit
27
M8913F2W
1 Mbit
256 Kbit Flash memory 16 Kbit
27
2.7-3.6 V
150 ns
M8934F2W
2 Mbit
256 Kbit Flash memory 64 Kbit
27
Note: 1. All products support: JTAG serial ISP, MCU parallel ISP, ISP Flash memory, ISP GPLD, Security features, Power Management
Unit (PMU), Automatic Power-down (APD)
2. SRAM may be backed up using an external battery.
2/7


Part Number M89K
Description In-System Programmable ISP Multiple-Memory and Logic FLASHPSD Systems for MCUs
Maker ST Microelectronics
Total Page 7 Pages
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