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SPC560P54L3 - 32-bit MCU

Download the SPC560P54L3 datasheet PDF. This datasheet also covers the SPC560P54L5 variant, as both devices belong to the same 32-bit mcu family and are provided as variant models within a single manufacturer datasheet.

General Description

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Key Features

  • AEC-Q10x qualified.
  • 64 MHz, single issue, 32-bit CPU core complex (e200z0h).
  • Compliant with Power Architecture® embedded category.
  • Variable Length Encoding (VLE).
  • Memory organization.
  • Up to 1024 KB on-chip code Flash memory with additional 64 KB for EEPROM emulation (data flash), with ECC, with erase/program controller.
  • Up to 80 KB on-chip SRAM with ECC.
  • Fail safe protection.
  • ECC protection on system SRAM and Flash.
  • Safet.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SPC560P54L5-STMicroelectronics.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by STMicroelectronics

Part Number Description
SPC560P54L5 32-bit MCU
SPC560P34L1 32-bit MCU
SPC560P34L3 32-bit MCU
SPC560P40L1 32-bit MCU
SPC560P40L3 32-bit MCU

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
SPC56AP60x, SPC56AP54x SPC560P60x, SPC560P54x 32-bit Power Architecture® based MCU with 1088KB Flash memory and 80KB RAM for automotive chassis and safety applications Datasheet - production data LQFP100 14 x 14 mm LQFP144 20 x 20 mm Features  AEC-Q10x qualified  64 MHz, single issue, 32-bit CPU core complex (e200z0h) – Compliant with Power Architecture® embedded category – Variable Length Encoding (VLE)  Memory organization – Up to 1024 KB on-chip code Flash memory with additional 64 KB for EEPROM emulation (data flash), with ECC, with erase/program controller – Up to 80 KB on-chip SRAM with ECC  Fail safe protection – ECC protection on system SRAM and Flash – Safety port – SWT with servicing sequence pseudorandom generator – Power management – Non-maskable interrupt for both cores