SPC564A74B4 Datasheet | STMicroelectronics

Key Features

• Fail Safe Protection – 16-entry Memory Protection Unit (MPU) – CRC unit with 3 sub-modules – Junction temperature sensor
• Interrupts – Configurable interrupt controller (with NMI) – 64-channel DMA
• Serial channels – 3  eSCI – 3  DSPI (2 of which support downstream Micro Second Channel [MSC]) Table
• 1  eTPU2 (second generation eTPU)
• 2 enhanced queued analog-to-digital converters (eQADCs)
• On-chip CAN/SCI/FlexRay Bootstrap loader with Boot Assist Module (BAM)
• Nexus: Class 3+ for core; Class 1 for the eTPU
• JTAG (5-pin)
• Development Trigger Semaphore (DTS)
• Clock generation – On-chip 4–40 MHz main oscillator – On-chip FMPLL (frequency-modulated phase-locked loop)