Click to expand full text
SPC564A74B4, SPC564A74L7, SPC564A80B4, SPC564A80L7
32-bit MCU family built on the embedded Power Architecture®
Features
■ 150 MHz e200z4 Power Architecture® core – Variable length instruction encoding (VLE) – Superscalar architecture with 2 execution units – Up to 2 integer or floating point instructions per cycle – Up to 4 multiply and accumulate operations per cycle
■ Memory organization – 4 MB on-chip flash memory with ECC and Read While Write (RWW) – 192 KB on-chip RAM with standby functionality (32 KB) and ECC – 8 KB instruction cache (with line locking), configurable as 2- or 4-way – 14 + 3 KB eTPU code and data RAM – 5 4 crossbar switch (XBAR) – 24-entry MMU – External Bus Interface (EBI) with slave and master port
■ Fail Safe Protection – 16-entry Memory Protection Unit (MPU) –
SPC564A74B4 Datasheet
