SPC574S60E3
Key Features
- AEC-Q100 qualified
- 128 KB on-chip RAM (96 KB on chip RAM + 32 KB local data RAM)
- Multi-channel direct memory access controller (eDMA) with 32 channels
- Cyclic redundancy check (CRC) unit
- 4 general purpose eTimer units (6 channels each)
- Dual phase-locked loops with stable clock domain for peripherals and FM modulation domain for putational shell
- Nexus Class 3 debug and trace interface
- On-chip CAN/UART Bootstrap loader with BAF. Physical Interface (PHY) can be UART
