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SPEAr320 Datasheet

SPEAr Embedded Microprocessors

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SPEAr320
Embedded MPU with ARM926 core
for factory automation and consumer applications
Preliminary data
Features
ARM926EJ-S 333 MHz core
High-performance 8-channel DMA
Dynamic power-saving features
Configurable peripheral functions multiplexed
on 102 shared I/Os
Memory:
– 32 KB ROM and 8 KB internal SRAM
– LPDDR-333/DDR2-666 external memory
interface
– SDIO/MMC card interface
– Serial SPI Flash interface
– Flexible static memory controller (FSMC)
up to 16-bit data bus width, supporting
NAND Flash
– External memory interface (EMI) up to 16-
bit data bus width, supporting NOR Flash
and FPGAs
Security
– C3 Cryptographic accelerator
Connectivity
– 2 x USB 2.0 Host
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– 1 x USB 2.0 Device
– 2 x fast Ethernet MII/SMII ports
– 2 x CAN interface
– 3 x SPI
– 2 x I2C
– 1 x I2S
– 1 x fast IrDA interface
– 3 x UART interface
– 1 x standard parallel device port
Peripherals supported
– TFT/STN LCD controller (resolution up to
1024 x 768 and up to 24 bpp)
– Touchscreen support
Miscellaneous functions
LFBGA289 (15 x 15 x 1.7 mm)
– Integrated real time clock, watchdog, and
system controller
– 8-channel 10-bit ADC, 1 Msps
– 4 x PWM timers
– JPEG CODEC accelerator
– 6 x 16-bit general purpose timers with and
programmable prescaler, 4 capture inputs
– Up to 102 GPIOs with interrupt capability
Applications
The SPEAr320 embedded MPU is configurable
for a range industrial and consumer applications
such as:
Programmable logic controllers
Factory automation
Printers
Table 1. Device summary
Order code
Temp
range, °C
Package Packing
SPEAR320-2 -40 to 85
LFBGA289
(15 x 15 mm,
pitch 0.8 mm)
Tray
November 2009
Doc ID 16755 Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
1/67
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67


STMicroelectronics Electronic Components Datasheet

SPEAr320 Datasheet

SPEAr Embedded Microprocessors

No Preview Available !

Contents
Contents
SPEAr320
Description 5
1.1 Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Architecture overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 CPU ARM 926EJ-S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Embedded memory units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Mobile DDR/DDR2 memory controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Serial memory interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5 External memory interface (EMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.6 Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . . 10
2.7 Multichannel DMA controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.8 SMII/MII Ethernet controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.9 MII Ethernet controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.10 CAN controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.11 USB2 host controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.12 USB2 device controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.13 CLCD controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.14 GPIOs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.15 Parallel port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.16
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2.17
2.18
SSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
I2S audio block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.19 UARTs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.19.1 UART0 with hardware flow control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.19.2 UART1 and UART2 with software flow control . . . . . . . . . . . . . . . . . . . . 17
2.20 JPEG CODEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.21 Cryptographic co-processor (C3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.22 8-channel ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.23 System controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.23.1 Power saving system mode control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.23.2 Clock and reset system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/67 Doc ID 16755 Rev 1


Part Number SPEAr320
Description SPEAr Embedded Microprocessors
Maker ST Microelectronics
Total Page 30 Pages
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