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ST10F269 - 16-BIT MCU

General Description

13 4- MEMORY ORGANIZATION 14 5- 5.1 - 5.2 - 5.3 - 5.3.1 5.3.2 5.3.3 5.3.4 5.3.5 5.3.6 5.3.7 - 5.4 - 5.5 - 5.5.1 5.5.2 5.5.3 - 5.6 - 5.6.1 5.6.2 5.6.3 5.6.4 5.6.5 - INTERNAL FLASH MEMORY OVERVIEW OPERATIONAL OVERVIEW ARCHITECTURAL DESCRIPTION Read Mode Command Mode Ready/Busy Signal Fl

Key Features

  • Enhanced Addressing Capabilities Multiply-Accumulate Unit Program Control.

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Other Datasheets by STMicroelectronics

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ST10F269 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA s HIGH PERFORMANCE 40MHz CPU WITH DSP FUNCTION – 16-BIT CPU WITH 4-STAGE PIPELINE – 50ns INSTRUCTION CYCLE TIME AT 40MHz MAX CPU CLOCK – MULTIPLY/ACCUMULATE UNIT (MAC) 16 x 16-BIT MULTIPLICATION, 40-BIT ACCUMULATOR – REPEAT UNIT – ENHANCED BOOLEAN BIT MANIPULATION FACILITIES – ADDITIONAL INSTRUCTIONS TO SUPPORT HLL AND OPERATING SYSTEMS – SINGLE-CYCLE CONTEXT SWITCHING SUPPORT s MEMORY ORGANIZATION – 256K BYTE ON-CHIP FLASH MEMORY SINGLE VOLTAGE WITH ERASE/PROGRAM CONTROLLER. – 100K ERASING/PROGRAMMING CYCLES.