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STMicroelectronics Electronic Components Datasheet

ST72F561 Datasheet

8-BIT MCU

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ST72561
8-bit MCU with Flash or ROM,
10-bit ADC, 5 timers, SPI, LINSCI, active CAN
Features
Memories
– 16K to 60K High Density Flash (HDFlash) or
ROM with read-out protection capability. In-
Application Programming and In-Circuit Pro-
)gramming for HDFlash devices
t(s– 1 to 2K RAM
c– HDFlash endurance: 100 cycles, data reten-
ution 40 years at 85°C
dClock, Reset and Supply Management
ro– Low power crystal/ceramic resonator oscilla-
tors and bypass for external clock
P– PLL for 2x frequency multiplication
te– 5 power saving modes: Halt, Auto Wake Up
leFrom Halt, Active Halt, Wait and Slow
oInterrupt Management
s– Nested interrupt controller
b– 14 interrupt vectors plus TRAP and RESET
O– TLI top level interrupt (on 64-pin devices)
-– Up to 21 external interrupt lines (on 4 vectors)
t(s)Up to 48 I/O Ports
– Up to 48 multifunctional bidirectional I/O lines
c– Up to 36 alternate function lines
u– Up to 6 high sink outputs
rod5 Timers
– 16-bit timer with 2 input captures, 2 output
Pcompares, external clock input, PWM and
tepulse generator modes
– 8-bit timer with 1 or 2 input captures, 1 or 2
leoutput compares, PWM and pulse generator
omodes
s– 8-bit PWM auto-reload timer with 1 or 2 input
bcaptures, 2 or 4 independent PWM output
O channels, output compare and time base in-
terrupt, external clock with event detector
LQFP32
7x7mm
LQFP64
14x14mm
LQFP44
10x10mm
LQFP64
10x10mm
– Main clock controller with real-time base and
clock output
– Window watchdog timer
Up to 4 Communications Interfaces
– SPI synchronous serial interface
– Master/slave LINSCIasynchronous serial
interface
– Master-only LINSCIasynchronous serial in-
terface
– CAN 2.0B active
Analog Peripheral (Low Current Coupling)
– 10-bit A/D converter with up to 16 inputs
– Up to 9 robust ports (low current coupling)
Instruction Set
– 8-bit data manipulation
– 63 basic instructions
– 17 main addressing modes
– 8 x 8 unsigned multiply instruction
Development Tools
– Full hardware/software development package
Table 1. Device Summary
Features
ST72561AR9/ST72561R9/
ST72561J9/ST72561K9
ST72561AR7
ST72561AR6/ST72561R6/ ST72561AR4/ST72561J4/
ST72561J6/ST72561K6
ST72561K4
Program memory - bytes
RAM (stack) - bytes
Operating Supply
CPU Frequency
Max. Temp. Range
Packages
60K 48K 32K 16K
2K (256)
2K (256)
1.5K (256)
1K (256)
4.5V to 5.5V
External Resonator Osc. w/ PLLx2/8 MHz
-40°C to +125°C
LQFP64 10x10mm (AR), LQFP64 14x14mm (R) LQFP44 10x10mm (J), LQFP32 7x7mm (K)
Rev. 7
October 2008
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1


STMicroelectronics Electronic Components Datasheet

ST72F561 Datasheet

8-BIT MCU

No Preview Available !

Table of Contents
1 DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 REGISTER AND MEMORY MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4 FLASH PROGRAM MEMORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.2 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.3 STRUCTURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.4 ICC INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.5 ICP (IN-CIRCUIT PROGRAMMING) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.6 IAP (IN-APPLICATION PROGRAMMING) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
)4.7 RELATED DOCUMENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
t(s4.8 REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
c5 CENTRAL PROCESSING UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
du5.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
ro5.2 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
P5.3 CPU REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
te6 SUPPLY, RESET AND CLOCK MANAGEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
le6.1 PHASE LOCKED LOOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
o6.2 MULTI-OSCILLATOR (MO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
bs6.3 RESET SEQUENCE MANAGER (RSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
O6.4 SYSTEM INTEGRITY MANAGEMENT (SI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
-7 INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
t(s)7.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.2 MASKING AND PROCESSING FLOW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
uc7.3 INTERRUPTS AND LOW POWER MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
rod7.4 CONCURRENT & NESTED MANAGEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
7.5 INTERRUPT REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
P7.6 EXTERNAL INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
lete8 POWER SAVING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
o8.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
s8.2 SLOW MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Ob8.3 WAIT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.4 HALT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.5 ACTIVE HALT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.6 AUTO WAKE-UP FROM HALT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
9 I/O PORTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
9.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
9.2 FUNCTIONAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
9.3 I/O PORT IMPLEMENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
9.4 LOW POWER MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2. 6. 5. . 49
9.5 INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
9.6 I/O PORT REGISTER CONFIGURATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
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Part Number ST72F561
Description 8-BIT MCU
Maker ST Microelectronics
Total Page 30 Pages
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