STE2001
DESCRIPTION
The STE2001 is a low power CMOS LCD controller driver. Designed to drive a 65 rows by 128 columns graphic display, provides all necessary functions in a single chip, including on-chip LCD supply and bias voltages generators, resulting in a minimum of externals ponents and in a very low power consumption. The STE2001 features three standard interfaces (Serial, parallel, I2C) for ease of interfacing with the host µcontroller.
Type Bumped Wafers
Bumped Dice on Waffle Pack
Ordering Number STE2001DIE1 STE2001DIE2
Figure 1. Block Diagram
CO to C127 R0 to R64
TIMING GENERATOR CLOCK
COLUMN DRIVERS
ROW DRIVERS
VLCDIN
BIAS VOLTAGE GENERATOR
DATA LATCHES
SHIFT REGISTER
VLCDSENSE VLCDOUT
HIGH VOLTAGE GENERATOR
65 x 128 RAM
RESET
SCROLL LOGIC
RES VDD1,2,3 VSS1,2 SEL1,2
TEST_0_13 DATA REGISTER INSTRUCTION REGISTER
DISPLAY CONTROL LOGIC
TEST
BSY_FLG
I2CBUS
PARALLEL
SERIAL
SDA_IN
SDA_OUT
DB0 to DB7 E
PD/C
SDIN
SCLK
SD/C
D00IN1137...
