STM32F401CD Datasheet | STMicroelectronics

Features - Includes ST state-of-the-art patented technology - Core: Arm® 32-bit Cortex®-M4 CPU with FPU, adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from flash memory, frequency up to 84 MHz, memory protection unit, 105 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions - Memories - Up to 512 Kbytes of flash memory - up to 96 Kbytes of SRAM - 512 bytes of OTP memory - Clock, reset, and supply management - 1.7 V to 3.6 V application supply and I/Os - POR, PDR, PVD, and BOR - 4-to-26 MHz crystal oscillator - Internal 16 MHz factory-trimmed RC - 32 k Hz oscillator for RTC with calibration - Internal 32 k Hz RC with calibration - Power consumption - Run: 146 µA/MHz (peripheral off) - Stop (Flash in Stop mode, fast wake-up time): 42 µA typical at 25 °C; 65 µA max at 25 °C - Stop (Flash in Deep power down mode, fast wake-up time): down to 10 µA at 25 °C; 30 µA max at 25 °C - Standby: 2.4 µA at 25 °C / 1.7 V without RTC; 12 µA at 85 °C at 1.7 V - VBAT supply for RTC: 1 µA at 25 °C - 1×12-bit, 2.4 MSPS A/D converter: up to 16 channels - General-purpose DMA: 16-stream DMA controllers with FIFOs and burst support - Up to 11 timers: up to six 16-bit, two 32-bit timers up to 84 MHz, each with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input, two watchdog timers (independent and window) and a Sys Tick timer UFBGA WLCSP49 LQFP100 (14 × 14 mm)U(7FQ× F7Pm Nm48) (3.029 x 3.029 mm)LQFP64 (10 × 10 mm) UFBGA100 (7 × 7 mm) - Debug mode - Serial wire debug (SWD) & JTAG interfaces - Cortex®-M4 Embedded Trace Macrocell™ - Up to 81 I/O ports with interrupt capability - Up to 78 fast I/Os up to 42 MHz - All I/O ports are 5 V-tolerant - Up to 12 munication interfaces - Up to 3 x I2C interfaces (SMBus/PMBus) - Up to 3 USARTs (2 x 10.5 Mbit/s, 1 x 5.25 Mbit/s), ISO 7816 interface, LIN, Ir DA, modem control) - Up to 4 SPIs (up to 42Mbit/s at ff Cul Pl-Ud=up8le4x MI2HSz)t,o Sa Pc Ih2ieavneda Su Pd Ii3o with muxed class...