STM32H725IE
Features
Includes ST state-of-the-art patented technology
Core
- 32-bit Arm® Cortex®-M7 CPU with DP-FPU, L1 cache: 32-Kbyte data cache and 32-Kbyte instruction cache allowing 0-wait state execution from embedded flash memory and external memories, frequency up to 550 MHz, MPU, 1177 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
Memories
- Up to 1 Mbyte of embedded flash memory with ECC
- SRAM: total 564 Kbytes all with ECC, including 128 Kbytes of data TCM RAM for critical realtime data + 432 Kbytes of system RAM (up to 256 Kbytes can remap on instruction TCM RAM for critical real time instructions) + 4 Kbytes of backup SRAM (available in the lowest-power modes)
- Flexible external memory controller with up to 24-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
- 2 x Octo-SPI interface with Xi P
- 2 x SD/SDIO/MMC interface
- Bootloader
Graphics
- Chrom-ART Accelerator graphical hardware accelerator enabling enhanced graphical user interface to reduce CPU...
