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STM32MP255A - MPU

Download the STM32MP255A datasheet PDF. This datasheet also covers the STM32MP251A variant, as both devices belong to the same mpu family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Includes ST state-of-the-art patented technology. Cores.
  • Up to 64-bit dual-core Arm® Cortex®-A35.
  • Up to 1.5 GHz.
  • 32-Kbyte I + 32-Kbyte D level 1 cache for each core.
  • 512-Kbyte unified level 2 cache.
  • Arm® NEON™ and Arm® TrustZone®.
  • 32-bit Arm® Cortex®-M33 with FPU/MPU.
  • Up to 400 MHz.
  • L1 16-Kbyte I / 16-Kbyte D.
  • Arm® TrustZone®.
  • 32-bit Arm® Cortex®-M0+ in SmartRun domain.
  • Up to 200 MHz (up to 16 MHz.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (STM32MP251A-STMicroelectronics.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Prerelease product(s) STM32MP251A/D STM32MP253A/D STM32MP255A/D STM32MP257A/D Datasheet Arm® based dual Cortex®-A35 1.5 GHz + Cortex®-M33 MPU, AI, 3D GPU, video enc./dec., TFT/DSI/LVDS, USB 3.0, PCIe® VFBGA361 (10 × 10 mm) pitch 0.5 mm VFBGA424 (14 × 14 mm) pitch 0.5 mm TFBGA436 (18 × 18 mm) pitch 0.8 mm Product summary STM32MP25xA/D STM32MP251A, STM32MP251D, STM32MP253A, STM32MP253D, STM32MP255A, STM32MP255D, STM32MP257A, STM32MP257D Features Includes ST state-of-the-art patented technology. Cores • Up to 64-bit dual-core Arm® Cortex®-A35 – Up to 1.