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STMicroelectronics Electronic Components Datasheet

STR91xFA Datasheet

32-bit Flash Microcontrollers

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STR91xFA pdf
STR91xFA
ARM966E-S™ 16/32-Bit Flash MCU with Ethernet, USB, CAN,
AC motor control, 4 timers, ADC, RTC, DMA
PRELIMINARY DATA
Features
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16/32-bit 96 MHz ARM9E based MCU
– ARM966E-S RISC core: Harvard archi-
tecture, 5-stage pipeline, Tightly-Coupled
Memories (SRAM and Flash)
– STR91xFA implementation of core adds
high-speed burst Flash memory interface,
instruction prefetch queue, branch cache
– Up to 96 MIPS directly from Flash memory
– Single-cycle DSP instructions are supported
– Binary compatible with 16/32-bit ARM7 code
Dual burst Flash memories, 32-bits wide
– 256KB/512KB Main Flash, 32KB 2nd Flash
– Sequential Burst operation up to 96 MHz
– 100K min erase cycles, 20 yr min retention
SRAM, 32-bits wide
– 64K or 96K bytes, optional battery backup
9 programmable DMA channels
– One for Ethernet, 8 programmable channels
Clock, reset, and supply management
– Two supplies required. Core: 1.8 V +/-10%,
I/O: 2.7 to 3.6 V
– Internal oscillator operating with external
4-25 MHz crystal
– Internal PLL up to 96MHz
– Real-time clock provides calendar functions,
tamper detection, and wake-up functions
– Reset Supervisor monitors voltage supplies,
watchdog timer, wake-up unit, ext. reset
– Brown-out monitor for early warning interrupt
– Run, Idle, and Sleep Mode as low as 50 uA
Operating temperature -40 to +85°C
Vectored interrupt controller (VIC)
– 32 IRQ vectors, 30 intr pins, any can be FIQ
– Branch cache minimizes interrupt latency
8-channel, 10-bit A/D converter (ADC)
– 0 to 3.6V range, 0.7 usec conversion
– DMA capability
LQFP80 12 x12mm
LQFP128 14 x 14mm
LFBGA144 10 x 10 x 1.7
10 Communication interfaces
– 10/100 Ethernet MAC with DMA and MII port
– USB Full-speed (12 Mbps) slave device
– CAN interface (2.0B Active)
– 3 16550-style UARTs with IrDA protocol
– 2 Fast I2C™, 400 kHz
– 2 channels for SPI™, SSI™, or Microwire™
External Memory Interface (EMI)
– 8- or 16-bit data
– Up to 24-bit addressing
– Static Async modes for LQFP128 packages
– Additional Burst Synchronous modes for
LFBGA144 packages
Up to 80 I/O pins (muxed with interfaces)
– 5 V tolerant, 16 have high sink current
(8 mA)
– Bit-wise manipulation of pins within a port
16-bit standard timers (TIM)
– 4 timers each with 2 input capture, 2 output
compare, PWM and pulse count modes
3-Phase induction motor controller (IMC)
– 3 pairs of PWM outputs, adjustable centers
– Emergency stop, dead-time gen, tach input
JTAG interface with boundary scan
– ARM EmbeddedICE® RT for debugging
– In-System Programming (ISP) of Flash
Embedded trace module (ARM ETM9)
– Hi-speed instruction tracing, 9-pin interface
May 2007
Rev 1
1/78
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without noticwew. w.st.com
78


STMicroelectronics Electronic Components Datasheet

STR91xFA Datasheet

32-bit Flash Microcontrollers

No Preview Available !

STR91xFA pdf
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Contents
STR91xFA
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 System-in-a-Package (SiP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Package choice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 ARM966E-S CPU core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Burst Flash memory interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4.1 Pre-Fetch Queue (PFQ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4.2 Branch Cache (BC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4.3 Management of literals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.5 SRAM (64K or 96K Bytes) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.5.1 Arbitration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.5.2 Battery backup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.6 DMA data movement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.7 Non-volatile memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.7.1 Primary Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.7.2 Secondary Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.8 One-time-programmable (OTP) memory . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.8.1 Product ID and revision level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.9 Vectored interrupt controller (VIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.9.1 FIQ handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.9.2 IRQ handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.9.3 Interrupt sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.10 Clock control unit (CCU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.10.1 Master clock sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.10.2 Reference clock (RCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.10.3 AHB clock (HCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.10.4 APB clock (PCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.10.5 Flash memory interface clock (FMICLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.10.6 Baud rate clock (BRCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.10.7 External memory interface bus clock (BCLK) . . . . . . . . . . . . . . . . . . . . . . . . 16
2.10.8 USB interface clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.10.9 Ethernet MAC clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/78


Part Number STR91xFA
Description 32-bit Flash Microcontrollers
Maker ST Microelectronics
Total Page 30 Pages
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