UPSD33xx Key Features
- 10 MIPs peak performance at 40MHz (5V)
- JTAG Debug and In-System Programming
- Branch Cache & 6 instruction Prefetch Queue
- Dual XDATA pointers with auto incr & decr
- patible with 3rd party 8051 tools DUAL FLASH MEMORIES WITH MEMORY MANAGEMENT
- Place either memory into 8032 program address space or data address space
- READ-while-WRITE operation for InApplication Programming and EEPROM emulation
- Single voltage program and erase
- 100K guaranteed erase cycles, 15-year retention CLOCK, RESET, AND SUPPLY MANAGEMENT
- SRAM is Battery Backup capable