K4T56083QF Description
AC & DC Operating Conditions & Specifications Page 2 of 27 Rev. 2005 256Mb F-die DDR2 SDRAM 0. Speed bin is in order of CL-tRCD-tRP.
K4T56083QF Key Features
- JEDEC standard 1.8V ± 0.1V Power Supply
- VDDQ = 1.8V ± 0.1V
- 4 Banks
- Posted CAS
- Programmable CAS Latency: 3, 4, 5
- Programmable Additive Latency: 0, 1 , 2 , 3 and 4
- Write Latency(WL) = Read Latency(RL) -1
- Burst Length: 4 , 8(Interleave/nibble sequential)
- Programmable Sequential / Interleave Burst Mode
- Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)