a field integration read out system and an electronic shutter with variable charge storage time. 16Pin Cer DIP FEATURES
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Table 1. Pin Description Pin 1 2 3 4 5 6 7 8 Symbol ΦV4 ΦV3 ΦV2 ΦV1 GND VGG VSS VOUT Description Vertical CCD transfer clock 4 Vertical CCD transfer clock 3 Vertical CCD transfer clock 2 Vertical CCD transfer clock 1 Ground Output stage gate bias Out.

KC73125UCA

KC73125MP

KC73129MP

KC73129UBA

KC73129UCA

KC73133

KC73133C

KC7050K

KC74125B

KC74125C

KC74129B

KC74129C

KC75118