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S3P80G9 - S3C8-SERIES MICROCONTROLLERS

Download the S3P80G9 datasheet PDF. This datasheet also covers the S3P80F7 variant, as both devices belong to the same s3c8-series microcontrollers family and are provided as variant models within a single manufacturer datasheet.

Description

of 44-QFP and 42-SDIP Pin Names P0.0

P0.7 Pin Type I/O Pin Description I/O port with bit-programmable pins.

Configurable to input or push-pull output mode.

Pull-up resistors can be assigned by software.

Features

  • include:.
  • Efficient register-oriented architecture.
  • Selectable CPU clock sources.
  • Idle and Stop power-down mode release by interrupt.
  • Built-in basic timer with watchdog function A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to specific interrupt levels. S3C80F7/C80F9/C80G7/C80G9 Microcontroll.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (S3P80F7_Samsungsemiconductor.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Samsung Semiconductor

Part Number Description
S3P80G7 S3C8-SERIES MICROCONTROLLERS
S3P8095 S3C8-SERIES MICROCONTROLLERS
S3P80E5 S3C8-SERIES MICROCONTROLLERS
S3P80E7 S3C8-SERIES MICROCONTROLLERS
S3P80F7 S3C8-SERIES MICROCONTROLLERS

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) PRODUCT OVERVIEW 1 PRODUCT OVERVIEW S3C8-SERIES MICROCONTROLLERS Samsung's S3C8 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include: — Efficient register-oriented architecture — Selectable CPU clock sources — Idle and Stop power-down mode release by interrupt — Built-in basic timer with watchdog function A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to specific interrupt levels.
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