a field integration read out system and an electronic shutter with variable charge storage time. 16Pin Cer-DIP FEATURES
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Table 1. Pin Description Pin 1 2 3 4 5 6 7 8 Symbol ΦV4 ΦV3 ΦV2 ΦV1 GND VGG VSS VOUT Description Vertical CCD transfer clock 4 Vertical CCD transfer clock 3 Vertical CCD transfer clock 2 Vertical CCD transfer clock 1 Ground Output stage gate bias Out.

S5F325NU02

S5F329PW02

S5F329PW02-DAB0

S5F333SZ03

S5F333SZ03-LBB0

S5F425NX03

S5F425NX03-LDB0

S5F429PX02

S5F429PX02-LAB0

S5F429PX03

S5F429PX03-LDB0

S5F518NZ03

S5F518NZ03-LEB0