* 1.0 V to 3.6 V, selectable in 0.05 V step A ceramic capacitor of 0.22 μF or more can be used for the output capacitor.
* Input voltage: 1.5 V to 5.5 V
* High-accuracy output voltage: ±1.0% (1.0 V to 1.45 V output product :±15 mV)
* Dropout voltage: 80 mV typ. (2.8 V output pr
S-13D1
Seiko
687.23 KB
High ripple-rejection low dropout cmos voltage regulator.
S-13D1 Series www.sii-ic.com © Seiko Instruments Inc., 2012 SUPER-SMALL PACKAGE 2-CIRCUIT BUILT-IN DELAY FUNCTION HIGH RIPPLE-REJECTION LOW DROPOUT C.
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