Datasheet4U Logo Datasheet4U.com

LH5496 - CMOS 512 x 9 FIFO

Description

The LH5496/96H are dual port memories with internal addressing to implement a First-In, First-Out algorithm.

Through an advanced dual port architecture, they provide fully asynchronous read/write operation.

Empty, Full, and Half-Full status flags are provided to prevent data overflow and underflow.

Features

  • Fast Access Times: 15.
  • /20/25/35/50/65/80 ns.
  • Full CMOS Dual Port Memory Array.
  • Fully Asynchronous Read and Write.
  • Expandable-in Width and Depth.
  • Full, Half-Full, and Empty Status Flags.
  • Read Retransmit Capability.
  • TTL Compatible I/O.
  • Packages: 28-Pin, 300-mil PDIP 28-Pin, 600-mil PDIP 32-Pin PLCC.
  • Pin and Functionally Compatible with IDT7201.

📥 Download Datasheet

Datasheet preview – LH5496

Datasheet Details

Part number LH5496
Manufacturer Sharp Corporation
File Size 141.77 KB
Description CMOS 512 x 9 FIFO
Datasheet download datasheet LH5496 Datasheet
Additional preview pages of the LH5496 datasheet.

📁 Similar Datasheet

  • LH5493 - 4K x 9 Parallel to Serial FIFO (Sharp)
  • LH5497 - CMOS 1K x 9 FIFO (Sharp)
  • LH5498 - CMOS 2K x 9 FIFO (Sharp)
  • LH5498U - CMOS 2K x 9 FIFO (Sharp)
  • LH5499 - CMOS 4K x 9 FIFO (Sharp)
  • LH5420 - 256 x 36 x 2 Bidirectional FIFO (Sharp)
  • LH5424 - 5 mm T1 3/4 LED/ Non Diffused Super-Bright/ Hyper-Red GaAIAs-LED (Siemens Semiconductor Group)
  • LH5464 - 5 mm T1 3/4 LED/ Diffused Super-Bright/ Hyper-Red GaAIAs-LED (Siemens Semiconductor Group)
  • LH5047 - (LH5047 / LH5048) CMOS 6-Bit D/A Converter (Sharp)
  • LH5048 - (LH5047 / LH5048) CMOS 6-Bit D/A Converter (Sharp)
Other Datasheets by Sharp Electrionic Components
  • LH5496H - CMOS 512 x 9 FIFO
  • LH5491 - Cascadable 64 x 8 FIFO Cascadable 64 x 9 FIFO
  • LH540202 - CMOS 1024 x 9 Asynchronous FIFO
  • LH540203 - CMOS 2048 x 9 Asynchronous FIFO
  • LH540204 - CMOS 4096 x 9 Asynchronous FIFO
  • LH540205 - CMOS 8192 x 9 Asynchronous FIFO
  • LH540215 - 512 x 18 / 1024 x 18 Synchronous FIFO
  • LH540225 - 512 x 18 / 1024 x 18 Synchronous FIFO

Full PDF Text Transcription

Click to expand full text
LH5496/96H FEATURES • Fast Access Times: 15 */20/25/35/50/65/80 ns • Full CMOS Dual Port Memory Array • Fully Asynchronous Read and Write • Expandable-in Width and Depth • Full, Half-Full, and Empty Status Flags • Read Retransmit Capability • TTL Compatible I/O • Packages: 28-Pin, 300-mil PDIP 28-Pin, 600-mil PDIP 32-Pin PLCC • Pin and Functionally Compatible with IDT7201 FUNCTIONAL DESCRIPTION The LH5496/96H are dual port memories with internal addressing to implement a First-In, First-Out algorithm. Through an advanced dual port architecture, they provide fully asynchronous read/write operation. Empty, Full, and Half-Full status flags are provided to prevent data overflow and underflow. In addition, internal logic provides for unlimited expansion in both word size and depth.
Published: |