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HYB39S64400/800/160AT(L) 64MBit Synchronous DRAM 64 MBit Synchronous DRAM
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High Performance:
-8 fCKmax. tCK3 tAC3 tCK2 tAC2 125 8 6 10 6 -8B 100 10 6 12 7 -10 100 10 7 15 8 Units MHz ns ns ns ns
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Multiple Burst Read with Single Write Operation Automatic Command and Controlled Precharge
Data Mask for Read / Write control (x4, x8) Data Mask for byte control (x16) Auto Refresh (CBR) and Self Refresh Suspend Mode and Power Down Mode 4096 refresh cycles / 64 ms Random Column Address every CLK ( 1-N Rule) Single 3.3V +/- 0.
HYB39S64400 Datasheet
