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TDA6050-5 - Video IF with FPLL/ MAC State

Description

The IF circuit consists of a four-stage capacitively coupled and symmetrically designed controlled amplifier and a real synchronous demodulator with a FPLL-carrier regeneration.

Two IF inputs can be selected for applications with different SAWs.

Features

  • q Active multistandard video IF with FPLL demodulator q 12-MHz bandwidth q MAC state P-DIP-20 Type TDA 6050-5 Ordering Code Q67000-A5123 Package P-DIP-20 Circuit.

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Video IF with FPLL, MAC State TDA 6050-5 Bipolar IC Features q Active multistandard video IF with FPLL demodulator q 12-MHz bandwidth q MAC state P-DIP-20 Type TDA 6050-5 Ordering Code Q67000-A5123 Package P-DIP-20 Circuit Description The IF circuit consists of a four-stage capacitively coupled and symmetrically designed controlled amplifier and a real synchronous demodulator with a FPLL-carrier regeneration. Two IF inputs can be selected for applications with different SAWs. The main performance of the device is the very low differential phase DP and gain DG combined with an excellent intermodulation ratio. The positive video output is used to derive the IF and tuner control voltage. The AGC threshold is set by means of a potentiometer.
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