SiS85C471 controller equivalent, single chip controller.
to allow a system, through the control of BIOS, to reduce the CPU clock frequency from 50MHz down to 0 MHz(STOP CLOCK) when the system is idle.
To support the SL-Enchance.
including (1) CPU accesses VL-Bus targets, (2) VL-Bus master mode, and (3) DMA or ISA master accesses VL-Bus targets.
Th.
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