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C8051F011 Datasheet Preview

C8051F011 Datasheet

Mixed-Signal 32KB ISP FLASH MCU

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C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Mixed-Signal 32KB ISP FLASH MCU Family
a
ANALOG PERIPHERALS
- SAR ADC
12-Bit (C8051F000/1/2, C8051F005/6/7)
10-bit (C8051F010/1/2, C8051F015/6/7)
±1LSB INL; No Missing Codes
Programmable Throughput up to 100ksps
Up to 8 External Inputs; Programmable as Single-
Ended or Differential
Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5
Data Dependent Windowed Interrupt Generator
Built-in Temperature Sensor (± 3°C)
- Two 12-bit DACs
- Two Analog Comparators
Programmable Hysteresis Values
Configurable to Generate Interrupts or Reset
- Voltage Reference
2.4V; 15 ppm/°C
Available on External Pin
- Precision VDD Monitor/Brown-out Detector
ON-CHIP JTAG DEBUG & BOUNDARY SCAN
- On-Chip Debug Circuitry Facilitates Full Speed, Non-
Intrusive In-System Debug (No Emulator Required!)
- Provides Breakpoints, Single Stepping, Watchpoints, Stack
Monitor
- Inspect/Modify Memory and Registers
- Superior Performance to Emulation Systems Using ICE-
Chips, Target Pods, and Sockets
- IEEE1149.1 Compliant Boundary Scan
- Low Cost Development Kit
HIGH SPEED 8051 µC CORE
- Pipelined Instruction Architecture; Executes 70% of
Instruction Set in 1 or 2 System Clocks
- Up to 25MIPS Throughput with 25MHz Clock
- 21 Vectored Interrupt Sources
MEMORY
- 256 Bytes Internal Data RAM (F000/01/02/10/11/12)
- 2304 Bytes Internal Data RAM (F005/06/07/15/16/17)
- 32k Bytes FLASH; In-System Programmable in 512 byte
Sectors
DIGITAL PERIPHERALS
- 4 Byte-Wide Port I/O; All are 5V tolerant
- Hardware SMBusTM (I2CTM Compatible), SPITM, and UART
Serial Ports Available Concurrently
- Programmable 16-bit Counter/Timer Array with Five
Capture/Compare Modules
- Four General Purpose 16-bit Counter/Timers
- Dedicated Watch-Dog Timer
- Bi-directional Reset
CLOCK SOURCES
- Internal Programmable Oscillator: 2-to-16MHz
- External Oscillator: Crystal, RC,C, or Clock
- Can Switch Between Clock Sources on-the-fly; Useful in
Power Saving Modes
SUPPLY VOLTAGE ........................2.7V to 3.6V
- Typical Operating Current: 12.5mA @ 25MHz
- Multiple Power Saving Sleep and Shutdown Modes
64-Pin TQFP, 48-Pin TQFP, 32-Pin LQFP
Temperature Range: –40°C to +85°C
ANALOG PERIPHERALS
TEMP
SENSOR
PGA
SAR
ADC
12-Bit
DAC
12-Bit
DAC
VREF
+
+-
-
VOLTAGE
COMPARATORS
DIGITAL I/O
PCA
SMBus
SPI Bus
UART
Timer 0
Timer 1
Timer 2
Timer 3
HIGH-SPEED CONTROLLER CORE
8051 CPU
(25MIPS)
32KB
ISP FLASH
CLOCK
CIRCUIT
JTAG
DEBUG
CIRCUITRY
256/2304 B
21
SANITY
SRAM INTERRUPTS CONTROL
Rev. 1.7 11/03
Copyright © 2003 by Silicon Laboratories




Silicon Laboratories

C8051F011 Datasheet Preview

C8051F011 Datasheet

Mixed-Signal 32KB ISP FLASH MCU

No Preview Available !

C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
TABLE OF CONTENTS
1. SYSTEM OVERVIEW ........................................................................................................8
Table 1.1. Product Selection Guide ...................................................................................................................8
Figure 1.1. C8051F000/05/10/15 Block Diagram .............................................................................................9
Figure 1.2. C8051F001/06/11/16 Block Diagram ...........................................................................................10
Figure 1.3. C8051F002/07/12/17 Block Diagram ...........................................................................................11
1.1. CIP-51TM CPU .......................................................................................................................................12
Figure 1.4. Comparison of Peak MCU Execution Speeds...............................................................................12
Figure 1.5. On-Board Clock and Reset............................................................................................................13
1.2. On-Board Memory.................................................................................................................................14
Figure 1.6. On-Board Memory Map................................................................................................................14
1.3. JTAG Debug and Boundary Scan..........................................................................................................15
Figure 1.7. Debug Environment Diagram .......................................................................................................15
1.4. Programmable Digital I/O and Crossbar ...............................................................................................16
Figure 1.8. Digital Crossbar Diagram..............................................................................................................16
1.5. Programmable Counter Array................................................................................................................17
Figure 1.9. PCA Block Diagram .....................................................................................................................17
1.6. Serial Ports.............................................................................................................................................17
1.7. Analog to Digital Converter ..................................................................................................................18
Figure 1.10. ADC Diagram .............................................................................................................................18
1.8. Comparators and DACs.........................................................................................................................19
Figure 1.11. Comparator and DAC Diagram...................................................................................................19
2. ABSOLUTE MAXIMUM RATINGS*.............................................................................20
3. GLOBAL DC ELECTRICAL CHARACTERISTICS ...................................................20
4. PINOUT AND PACKAGE DEFINITIONS ....................................................................21
Table 4.1. Pin Definitions................................................................................................................................21
Figure 4.1. TQFP-64 Pinout Diagram .............................................................................................................23
Figure 4.2. TQFP-64 Package Drawing ..........................................................................................................24
Figure 4.3. TQFP-48 Pinout Diagram .............................................................................................................25
Figure 4.4. TQFP-48 Package Drawing ..........................................................................................................26
Figure 4.5. LQFP-32 Pinout Diagram .............................................................................................................27
Figure 4.6. LQFP-32 Package Drawing ..........................................................................................................28
5. ADC (12-Bit, C8051F000/1/2/5/6/7 Only).........................................................................29
Figure 5.1. 12-Bit ADC Functional Block Diagram........................................................................................29
5.1. Analog Multiplexer and PGA................................................................................................................29
5.2. ADC Modes of Operation......................................................................................................................30
Figure 5.2. 12-Bit ADC Track and Conversion Example Timing...................................................................30
Figure 5.3. Temperature Sensor Transfer Function.........................................................................................31
Figure 5.4. AMX0CF: AMUX Configuration Register (C8051F00x) ............................................................31
Figure 5.5. AMX0SL: AMUX Channel Select Register (C8051F00x)...........................................................32
Figure 5.6. ADC0CF: ADC Configuration Register (C8051F00x).................................................................33
Figure 5.7. ADC0CN: ADC Control Register (C8051F00x) ..........................................................................34
Figure 5.8. ADC0H: ADC Data Word MSB Register (C8051F00x) .............................................................35
Figure 5.9. ADC0L: ADC Data Word LSB Register (C8051F00x)...............................................................35
5.3. ADC Programmable Window Detector.................................................................................................36
Figure 5.10. ADC0GTH: ADC Greater-Than Data High Byte Register (C8051F00x) ..................................36
Figure 5.11. ADC0GTL: ADC Greater-Than Data Low Byte Register (C8051F00x) ...................................36
Figure 5.12. ADC0LTH: ADC Less-Than Data High Byte Register (C8051F00x) .......................................36
Figure 5.13. ADC0LTL: ADC Less-Than Data Low Byte Register (C8051F00x).........................................36
Figure 5.14. 12-Bit ADC Window Interrupt Examples, Right Justified Data.................................................37
Figure 5.15. 12-Bit ADC Window Interrupt Examples, Left Justified Data ...................................................37
Figure 5.15. 12-Bit ADC Window Interrupt Examples, Left Justified Data ...................................................38
Rev. 1.7
2


Part Number C8051F011
Description Mixed-Signal 32KB ISP FLASH MCU
Maker Silicon Laboratories
Total Page 30 Pages
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