C8051F801 Description
executes 70% of instructions in 1 or 2 system clocks - Up to 25 MIPS throughput with 25 MHz clock - Expanded interrupt handler Memory - Up to 512 bytes internal data RAM (256 + 256) - Up to 16 kB Flash; In-system programmable in 512-byte sectors Digital Peripherals - 17 or 13 Port I/O with high sink current - Hardware enhanced UART, SMBus™ (I2C pati- ble), and enhanced SPI™ serial ports - Three general purpose...