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SI53306 Datasheet 1:4 LOW-JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR

Manufacturer: Silicon Laboratories

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General Description

The Si53306 is an ultra low jitter four output differential buffer with pin-selectable output clock signal format.

The Si53306 utilizes Silicon Laboratories' advanced CMOS technology to fanout clocks from 1 to 725 MHz with guaranteed low additive jitter, low skew, and low propagation delay variability.

The Si53306

Overview

Si53306 1:4 LOW-JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR.

Key Features

  • 4 differential or 8 LVCMOS outputs.
  • Independent VDD and VDDO :.
  • Ultra-low additive jitter: 45 fs rms 1.8/2.5/3.3 V.
  • Wide frequency range: 1 to 725 MHz.
  • 1.2/1.5 V LVCMOS output support.
  • Any-format input with pin selectable.
  • Selectable LVCMOS drive strength to output formats: LVPECL, low power tailor jitter and EMI performance LVPECL, LVDS, CML, HCSL, LVCMOS.
  • Synchronous output enable.
  • Small size: 16-QFN (3 mm x 3 mm).
  • RoHS compliant, Pb-f.

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