SI53321 Datasheet Low-Jitter LVPECL Fanout Clock Buffers

Manufacturer: Silicon Laboratories

Overview: Si53320-28 Data Sheet Low-Jitter LVPECL Fanout Clock Buffers with up to 10 LVPECL Outputs from Any-Format Input and Wide Frequency Range from DC up to 1250 MHz The Si53320–28 family of LVPECL fanout buffers is ideal for clock/data distribution and redundant clocking applications. These devices feature typical ultra-low jitter characteristics of 50 fs and operate over a wide frequency range from dc to 725/1250 MHz. Builtin LDOs deliver high PSRR performance and reduce the need for external components, simplifying low-jitter clock distribution in noisy environments. The Si53320–28 family is available in multiple configurations, with some versions offering a selectable input clock using a 2:1 input mux.

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SI53321 low-jitter lvpecl fanout clock buffers by Silicon Laboratories - Datasheet Preview

Datasheet Details

Part number	SI53321
Manufacturer	Silicon Laboratories
File Size	1.08 MB
Description	Low-Jitter LVPECL Fanout Clock Buffers
Download	SI53321 Download (PDF)

Key Features

include independent output enable and built-in format translation. These buffers can be paired with the Si534x clocks and Si5xx oscillators to deliver end-to-end clock tree performance. KEY.

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