SS6383 Datasheet | Silicon Standard

SS6383(G) 1.5A DDR Termination Regulator Features Source and sink current capability of 1.5A Low output voltage offset, ±20m V DESCRIPTION The SS6383 linear regulator is designed to provide 1.5A source and sink current while regulating an output voltage to within 25m V. The SS6383 converts voltage supplies ranging from 1.6V to 6V into an output voltage that is set by two external voltage-divider resistors. It provides an excellent voltage source for active termination schemes for high-speed transmission lines such as those seen in highspeed memory buses. The built-in current-limiting in source and sink mode, together with thermal shutdown, provides maximum protection to the SS6383 against fault conditions. High accuracy output voltage at full-load VOUT adjustable by external resistors Low external ponent count Current limit protection Thermal protection SO-8 package APPLICATIONS Mother Board Graphic Cards DDR Termination Voltage Supply - supports DDR1 (1.25VTT), DDR2 (0.9VTT), and meets JEDEC SSTL-2 and SSTL-3 term. specifications .Data Sheet.net/ TYPICAL APPLICATION CIRCUIT VIN=2.5V CIN 470µF + 1 R1 100K 2 3 C1 R2 EN 100p F 100K SSM7002EN VOUT=1.25V + 4 VIN GND VREF VOUT VCNTL VCNTL VCNTL VCNTL 8 VCNTL=3.3V CCNTL 47µF 6 5 + COUT 220µF This device is available with Pb-free lead finish (second-level interconnect) as SS6383GS 10/07/2004 Rev.1.01 .Silicon Standard. 1 of 7 Datasheet pdf - http://..co.kr/ SS6383(G) ORDERING INFORMATION SS6383XX XX TOP VIEW PIN CONFIGURATION SO-8 Packing TR: Tape and reel Package type CS: SO-8, mercial GS: SO-8, mercial with Pb-free lead finish Example: SS6383GSTR in SO-8 package with Pb-free lead finish shipped on tape and reel VIN 1 GND 2 VREF 3 VOUT 4 8 VCNTL 7 VCNTL 6 VCNTL 5...