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Sirenea

SZA-5044 Datasheet Preview

SZA-5044 Datasheet

Power Amplifier

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Product Description
Sirenza Microdevices’ SZA-5044 is a high efficiency class
AB Heterojunction Bipolar Transistor (HBT) amplifier
housed in a low-cost surface-mountable plastic package.
This HBT amplifier is made with InGaP on GaAs device
technology and fabricated with MOCVD for an ideal com-
bination of low cost and high reliability.
Preliminary
SZA-5044
4.9 – 5.9 GHz 5V Power Amplifier
This product is specifically designed as a final stage for
802.11a equipment in the 4.9 - 5.9 GHz band for a 5V sup-
ply. Optimized on-chip impedance matching circuitry pro-
vides a 50nominal RF input impedance. A single
external output matching circuit covers the entire 4.9-
5.9GHz band simultaneously. The external output match
allows for load line optimization for other applications or
optimized performance over narrower bands.
Functional Block Diagram
Pow er
Up/Dow n
Control
Activ e
Bias
Activ e
Bias
Vcc
Activ e
Bias
4mm x 4mm QFN Package
Product Features
802.11a 54Mb/s Class AB Performance
Pout = 21.5dBm @ 3% EVM, 5V, 310mA
High Gain = 28dB
Output Return Loss < -11dB for Linear Tune
On-chip Output Power Detector
P1dB = 29dBm @ 5V
Simultaneous 4.9- 5.9GHz Performance
Robust - Survives RF Input Power = +15dBm
Power up/down control < 1µs, Vpc 2.9V to 5V
RFIN RFOUT Applications
Key Specifications
Pow er Detector
Vout
802.11a WLAN, OFDM
5.8GHz ISM Band
Fixed Wireless, UNII, 802.16 WiMAX
Symbol
Parameters: Test Conditions, App circuit page 4
Z0 = 50, VCC = 5.0V, Icq = 220mA, TBP = 25ºC
Unit
Min.
Typ.
fO Frequency of Operation
MHz
4900
P1dB
Output Power at 1dB Compression – 5.15 GHz
Output Power at 1dB Compression – 5.875 GHz
dBm
28.0
26.5
29.5
28.0
Max.
5900
Gain at 5.15 GHz
27.2
29.2
31.2
S21 Gain at 5.875 GHz
dB
24.4
26.4
28.4
.comPout
Output power at 3% EVM 802.11a 54Mb/s - 5.15GHz
Output Power at 3% EVM 802.11a 54Mb/s - 5.875GHz
dBm
22
21
NF Noise Figure at 5.875 GHz
dB 6.3
UIRL
t4ORL
Worst Case Input Return Loss 5.15-5.875GHz
Worst Case Output Return Loss 5.15-5.875GHz
10 15
dB
7 11
eVdet Range Output Voltage Range for Pout=10dBm to 26dBm
V
0.8 to 1.9
eIcq Vcc Quiescent Current
mA 185 220 255
ShIVPC
taRth, j-l
Power Up Control Current, Vpc=5V ( IVPC1 + IVPC2 + IVPC3 )
Thermal Resistance (junction - lead)
mA
ºC/W
1.7
24
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or ommisions.
aSirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without
notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product
.Dfor use in life-support devices and/or systems.
Copyright 2002 Sirenza Microdevices, Inc. All worldwide rights reserved.
w303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC
http://www.sirenza.com
ww 1 EDS-103585 Rev C




Sirenea

SZA-5044 Datasheet Preview

SZA-5044 Datasheet

Power Amplifier

No Preview Available !

www.DataSheet4U.com
Preliminary
Pin Out Description
Pin # Function
SZA-5044 4.9-5.9 GHz Power Amp
Description
1,3,5,9,
11,15,17
N/C Pins are not used. May be grounded, left open, or connected to adjacent pin.
VPC1 is the bias control pin for the stage 1 active bias circuit and can be run from 2.9V to 5V control. An exter-
6
VPC1
nal series resistor is required for proper setting of bias levels depending on control voltage. Refer to the evalu-
ation board schematic for resistor value. To prevent potential damage, do not apply voltage to this pin that is
+1V greater than voltage applied to pin 20 (Vbias) unless Vpc supply current capability is less than 10 mA.
VPC2 is the bias control pin for the stage 2 active bias circuit and can be run from 2.9V to 5V control. An exter-
7
VPC2
nal series resistor is required for proper setting of bias levels depending on control voltage. Refer to the evalu-
ation board schematic for resistor value. To prevent potential damage, do not apply voltage to this pin that is
+1V greater than voltage applied to pin 20 (Vbias) unless Vpc supply current capability is less than 10 mA.
VPC3 is the bias control pin for the stage 3 active bias circuit and can be run from 2.9V to 5V control. An exter-
8
VPC3
nal series resistor is required for proper setting of bias levels depending on control voltage. Refer to the evalu-
ation board schematic for resistor value. To prevent potential damage, do not apply voltage to this pin that is
+1V greater than voltage applied to pin 20 (Vbias) unless Vpc supply current capability is less than 10 mA.
10 Vdet Ouput power detector voltage. Load with 10K-100K ohms to ground for best performance.
2,4
RFIN
RF input pins. This is DC grounded internal to the IC. Do not apply voltage to this pin. All three pins must be
used for proper operation.
12,13,14 RFOUT RF output pin. This is also another connection to the 3rd stage collector
16 VC3 3rd stage collector bias pin. Apply 5V to this pin.
18 VC2 2nd stage collector bias pin. Apply 5V to this pin.
19 VC1 1st stage collector bias pin. Apply 5V to this pin.
20 Vbias Active bias network VCC. Apply 5V to this pin.
EPAD
Exposed area on the bottom side of the package needs to be soldered to the ground plane of the board for
Gnd optimum thermal and RF performance. Several vias should be located under the EPAD as shown in the rec-
ommended land pattern (page 5).
Simplified Device Schematic
Absolute Maximum Ratings
Parameters
Value
Unit
Pin Pin Pin Pin
6 20 19 7
Pin Pin
18 8
Pin
16
VC3 Collector Bias Current (pin16)
VC2 Collector Bias Current (pin18)
500 mA
225 mA
VC1 Collector Bias Current (pin19)
75 mA
Device Voltage (VD)
7.0 V
Stage 1
Stage 2
Stage 3
Power Dissipation
3.4 W
Bias
Bias
Bias
Operating Lead Temperature (TL)
-40 to +85
ºC
t4U.comPin 2, 4
EPAD
Pin 12,13,14
EPAD
Pin
10
EPAD
SheeCaution: ESD Sensitive
taAppropriate precaution in handling, packaging
and testing devices must be observed.
RF Input Power for 50 ohm RF out load
15
dBm
RF Input Power for 10:1 VSWR RF out
load
2
dBm
Storage Temperature Range
-40 to +150
ºC
Operating Junction Temperature (TJ)
ESD Human Body Model
+150
>1000
ºC
V
Operation of this device beyond any one of these limits may
cause permanent damage. For reliable continuous operation
the device voltage and current must not exceed the maximum
operating values specified in the table on page one.
Bias conditions should also satisfy the following expression:
IDVD < (TJ - TL) / RTH’ j-l
www.Da303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC
2
http://www.sirenza.com
EDS-103585 Rev C


Part Number SZA-5044
Description Power Amplifier
Maker Sirenea
Total Page 8 Pages
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