Si53307 Datasheet | Skyworks Solutions

Si5330x Data Sheet Ultra-Low Additive Jitter Fanout Clock Buffers with up to 10 Universal Outputs from Any-Format Input and Wide Frequency Range from 1 MHz to 725 MHz The Si5330x family of Universal/Any-format fanout buffers is ideal for clock distribution (1 MHz minimum) and redundant clocking applications. These devices feature typical ultra-low jitter characteristics of 50 fs and operate over a wide frequency range. Built-in LDOs deliver high PSRR performance and reduce the need for external ponents, simplifying low-jitter clock distribution in noisy environments. The Si5330x family is available in multiple configurations, with some versions offering a selectable input clock using a 2:1 input mux. Other Features include independent (synchronous) output enable, glitchless switching, LOS monitor of input clocks, output clock division, and built-in format translation. These buffers can be paired with the Si534x clocks and jitter attenuators, the Si5332 clocks, and the Si5xx oscillators to deliver end-to-end clock tree performance. KEY Features - Ultra-low additive jitter: 50 fs rms - Built-in LDOs for high PSRR performance - Up to 10 outputs - Any-format Inputs (LVPECL, Low-power LVPECL, LVDS, CML, HCSL, LVCMOS) - Wide frequency range - Output Enable option - Multiple configuration options - Dual Bank option - 2:1 Input Mux operation - Synchronous output enable - Loss of signal (LOS) monitors for loss of input clock - Output clock division: /1, /2, /4 - Ro HS pliant, Pb-free - Temperature range: - 40 to +85 °C Skyworks Solutions, Inc. - Phone [781] 376-3000 - Fax [781] 376-3100 - sales@skyworksinc. - .skyworksinc. Rev. 1.0 - Skyworks Proprietary Information - Products and Product Information are Subject to Change Without Notice - November 5,...