CXL5506P Datasheet | Sony Semiconductor Solutions

Description The CXL5506M/P are CMOS-CCD delay line ICs that provide 1H delay time for PAL signals including the external low-pass filter. Features - Single 5V power supply - Low power consumption 95m W (Typ.) - Built-in peripheral circuits Functions - 1130-bit CCD register - Clock driver - Auto-bias circuit - Input clamp circuit - Sample-and-hold circuit Structure CMOS-CCD CXL5506M 8 pin SOP (Plastic) CXL5506P 8 pin DIP (Plastic) Absolute Maximum Ratings (Ta = 25°C) - Supply voltage VDD 6 V - Operating temperature Topr - 10 to +60 °C - Storage temperature Tstg - 55 to +150 °C - Allowable power dissipation PD CXL5506M 350 m W CXL5506P 480 m W Remended Operating Condition (Ta = 25°C) Supply voltage VDD 5 ± 5% V Remended Clock Conditions (Ta = 25°C) - Input clock amplitude VCLK 0.3 to 1.0 Vp-p (0.5Vp-p typ.) - Clock frequency f CLK 17.734475 MHz - Input clock waveform Sine wave Blook Diagram and Pin Configuration (Top View) AB VDD Input Signal Amplitude VSIG 575m Vp-p (Max.) (at internal clamp condition) VG1 CLK 5 Timing circuit Clock driver Bias circuit (A) Output circuit Bias circuit (B) 4 Auto-bias circuit Bias circuit CCD (1130bit) (S/H 1bit) Clamp circuit VG2 Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. - 1-...