Description
of Spansion data sheet designations are presented here to highlight their presence and definitions.
Features
- RM Cortex-M3 Core Processor version: r2p1 Up to 40 MHz Frequency Operation Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels 24-bit System timer (Sys Tick): System timer for OS task management.
- On-chip Memories [Flash memory]
64 Kbytes Read cycle: 0 wait-cycle Security function for code protection [SRAM] This series contains 4 Kbyte on-chip SRAM memories that is connected to System bus of.
MB9A120L-Spansion.pdf
