Description
of Spansion data sheet designations are presented here to highlight their presence and definitions.
Features
- RM Cortex-M3 Core
Processor version: r2p0 Up to 80MHz Frequency Operation Memory Protection Unit (MPU): improve the reliability of an embedded system Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48
peripheral interrupts and 16 priority levels 24-bit System timer (Sys Tick): System timer for OS task management.
- On-chip Memories
[Flash memory] Up to 512 Kbyte Read cycle: 0wait-cycle@up to 60MHz, 2wait-cycle.
- above.
- : Instruction pre-fetch.
MB9B100A-Spansion.pdf
