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Supertex

VP13A Datasheet Preview

VP13A Datasheet

P-Channel Enhancement-Mode Vertical DMOS FETs

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(J) §upertexinc.
VP13A
P-Channel Enhancement-Mode
Vertical DMOS Power FETs
Ordering Information
BVoss I
BVOGS
-40V
-60V
-100V
ROSION}
(max)
250
250
250
Features
o Freedom from secondary breakdown
o Low power drive requirement
o Ease of paralleling
o Low CISS and fast switching speeds
o Excellent thermal stability
o Integral Source-Drain diode
o High input impedance and high gain
o Complementary N- and P-Channel devices
ID(ON}
(min)
-O.25A
-O.25A
-O.25A
Order Number I Package
TO·39
TO·92
VP1304N2
VP1304N3
VP1306N2
VP1306N3
VP1310N2
VP1310N3
Advanced DMOS Technology
These enhancement-mode (normally-off) power transistors util-
ize a vertical DMOS structure and Supertex's well-proven silicon-
gate manufacturing process. This combination produces devices
with the power handling capabilities of bipolar transistors and with
the high input impedance and negative temperature coefficient
inherent in MOS devices. Characteristic of all MOS structures,
these devices are free from thermal runaway and thermally-
induced secondary breakdown.
Supertex Vertical DMOS Power FETs are ideally suited to a wide
range of switching and amplifying applications where high break-
down voltage, high input impedance, low input capacitance, and
fast switching speeds are desired.
'II)
Applications
o Motor control
o Convertors
o Amplifiers
o Switches
o Power supply circuits
o Driver (Relays, Hammers, SolenOids, Lamps,
Memories, Displays, Bipolar Transistors, etc.)
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature'
"'Distance of 1.6 mm from case for 10 seconds.
Package Options
i
TO-39
TO-92
±20V
Note 1: See Package Outline section for discrete pinouts.
9-65
(Note 1)




Supertex

VP13A Datasheet Preview

VP13A Datasheet

P-Channel Enhancement-Mode Vertical DMOS FETs

No Preview Available !

Thermal Characteristics
Package
10 (continu()us)*
10 (pulsetl)*
TO-39
TO-92
-0.25A
-0.15A
• 10 (continuous) Is limited by max rated Tr
-O.SA
-0.S5A
Power Dissipation
<SITe =25°C
3.0W
O.SW
81a
°CIW,
125
170
81c
°CIW
41
155
lOR
-0.25A
-0.15A
VP13A
lOAM·
-O.SA
-0.S5A
Electrical Characteristics (@ 25°C unless otherwise specified)
(Noles 1 and 2)
Symbc»1
BVoss
VGSth
"VGSCth
IGSS
IDSS
Paramater
Drain-Io-Source
Breakdown Voltage
Gale Threshold Voltage
VP1310
VP130S
VP1304
Change in VGSCthl with Temperature
Gale Body Leakage
Zero Gale Voltage Drain Currenl
Min Typ Max Unit
-100
-SO V
-40
-1.5 -3.5 V
-3.2 -3.S5 mV/oC
-0.1 -100
nA
-10
l-
-500
ilA
10(ON)
ON-State Drain Currenl
-.OS -0.2
-0.25 -0.45
A
ROS(ON)
Stalic Drain-la-Source
ON-Slale Resislance
30 40 n
1S 25
"ROSlON)
G."
C1SS
Coss
CRSS
Change in ROS{ON) with Temperalure
Forward Transconductance
Inpul Capacitance
Common Source Outpul Capacitance
Reverse Transfer Capacitance
O.S
75 120
20
12
3
1.1 %/oC
mU
35
15 pF
5
trilON,
Tum-ON Delay Time
35
I,
td OFF)
Rise Time
Turn-OFF Delay Time
35
ns
35
~ Fall Time
35
Vso Diode Forward Voltage Drop
-1.2 -1.7
V
I" Reverse Recovery Time
350 ns
Note 1: All D.C. parameters 100% tested at 25'C unless otherwise stated. (Pulse test: 300Il8 pulse. 2% duty cycle.)
Note 2: All A.C, parameters sample tested.
Conditions
10~-1mA, VGS~O
VGS ~ Vos' 10 ~ -1mA
VGS ~ Vos' 10 ~ -1mA
VGS ~ ±2.0V, Vos ~ 0
VGS ~ 0, Vos ~ Max Raling
VGS ~ 0, Vos ~ O.S Max Raling
TA ~ 125°C
VGS ~ -5V, Vos ~ -25V
VGS~-10V, Vos~-25V
VGS ~ -5V, 10 ~ -50mA
VGS ~ -10V, 10 ~ -250mA
10~-250mA, VGS~-10V
Vn" ~ -25V, In ~ -2oomA
VGS ~ 0, Vos ~ -25V
f~ 1 MHz
Voo~-25V
10~-200mA
Rs~50n
Iso ~ -1A, VGS ~ 0
ISD ~ -1A, VGS ~ 0
Switching Waveforms and Test Circuit
td(ON)
Output _ _ _ _-.!
10%
9-66
r-~---1JSCOPE
D.U.T.


Part Number VP13A
Description P-Channel Enhancement-Mode Vertical DMOS FETs
Maker Supertex
Total Page 4 Pages
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