Instructions 225 Appendix 3: Trapped Opcodes 229 Appendix 4: Known Timing Differences 231
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Chapter 1
Introduction
This book documents the operation of the Y8002 microprocessor. The Y8002 design is supplied in Verilog HDL format and can be implemented in any technology supported by a logic synthesis tool that accepts Verilog HDL. The design requires roughly 15K logic gate equivalents. Included in the design package is a test bench that exercises all implemented instructions, flag settings.