TDA4454 Datasheet | TEMIC Semiconductors

TELEFUNKEN Semiconductors TDA4454 Multistandard VIF Amplifier and PLL Demodulator Application Monolithic integrated circuit for vision IF signal processing in multistandard TV and VTR sets. Description This multistandard video IF processing circuit with PLL picture carrier regeneration gives a high performance of linear video demodulation. The IF signal is internally fed via a 3-stage controlled wideband amplifier to the video demodulator and the phase detector. The phase detector pares the phase of IF signal (0°) with the output signal of the VCO (90°) and sets the VCO frequency accordingly. A lock detector switches the PLL loop filter according to the state of the PLL (locked-PLL slow, unlocked-PLL fast). A second output of the VCO (0°) provides the reference carrier for the video demodulator. The polarity of the demodulator can be inverted by the standard switch (Pin 10), so that negative or positive modulated IF signals are always available with the same polarity at the demodulator output. The demodulated video signal is filtered, amplified and fed via an interference limiter to the video output (Pin 6). The standard switch also determines the clamp level of the video amplifier and the required IF-AGC mode. In the standard B/G mode the sync peak value is the criterion for a fast charge and discharge. In the standard L mode on the other hand, fast AGC action is achieved by charging at peak white level and discharging by the averaged video signal (time constant on Pin 7). The response level for discharge has a hysteresis. In the D2MAC mode a similar function is applied to achieve the AGC, but with different threshold levels. An overload detector prevents the PLL being unlocked by large IF input signals. To achieve a delayed tuner-AGC action, the current...