Description
Quad Bus Buffer, Non-Inverted 3-State Outputs 74HC125D: Quad Bus Buffer 74HC126D: Quad Bus Buffer
2. General
The 74HC125D,74HC126D are high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate C2MOS technology.They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.The 74HC125D requires the 3-state control input G to be set high to place the output into the high impedance state, whereas the 74HC126D requires the control i
Features
- (1) High speed: tpd = 10 ns (typ. ) at VCC = 6.0 V (2) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25  (3) Balanced propagation delays: tPLH ≈ tPHL (4) Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
4. Packaging
SOIC14
©2016 Toshiba Corporation
1
Start of commercial production
2016-02
2016-08-04 Rev.4.0
5. Pin Assignment
74HC125D
74HC125D,74HC126D
74HC126D
6. Marking
74HC125D
7. IEC Logic Symbol
74HC125D
74HC126D 74HC126D
©2016 Toshiba Corporation
2
2016-08-04 Rev.4.0
8.