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74HC175D - Quad D-Type Flip-Flop

General Description

2.

The 74HC175D is a high speed CMOS D-TYPE FLIP FLOP fabricated with silicon gate C2MOS technology.

It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

Key Features

  • (1) High speed: fMAX = 63 MHz (typ. ) at VCC = 5 V (2) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25  (3) Balanced propagation delays: tPLH ≈ tPHL (4) Wide operating voltage range: VCC(opr) = 2.0 V to 6.0 V 4. Packaging SOIC16 ©2016 Toshiba Corporation 1 Start of commercial production 2016-05 2016-08-04 Rev.3.0 5. Pin Assignment 74HC175D 6. Marking 7. IEC Logic Symbol 8. Truth Table X: Don't care ©2016 Toshiba Corporation 2 2016-08-04 Rev.3.0 9. System Diagram 74HC175D 10.

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Datasheet Details

Part number 74HC175D
Manufacturer Toshiba
File Size 206.56 KB
Description Quad D-Type Flip-Flop
Datasheet download datasheet 74HC175D Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CMOS Digital Integrated Circuits Silicon Monolithic 74HC175D 74HC175D 1. Functional Description • Quad D-Type Flip-Flop with Clear 2. General The 74HC175D is a high speed CMOS D-TYPE FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Information signals applied to D inputs are transferred to the Q and Q outputs on the positive going edge of the clock pulse. When the CLR input is held low, the Q outputs are at the low logic level and the Q outputs are at the high logic level independent of the other inputs. All inputs are equipped with protection circuits against static discharge or transient excess voltage. 3. Features (1) High speed: fMAX = 63 MHz (typ.