TC518128BFWL-80V Datasheet, Toshiba

a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RMI thus simplifying the microprocessor inter.

The TC518128B-V is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits. The TC518128B-V utilizes a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, high speed and low power stora.