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Toshiba Electronic Components Datasheet

TC74ACT280F Datasheet

9-Bit Parity Generator/Checker

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TC74ACT280P/F
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74ACT280P, TC74ACT280F
9-Bit Parity Generator/Checker
The TC74ACT280 is an advanced high speed CMOS 9-BIT
PARITY GENERATOR fabricated with silicon gate and
double-layer metal wiring C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
This device may be used as a level converter for interfacing
TTL or NMOS to High Speed CMOS. The inputs are compatible
with TTL, NMOS and CMOS output voltage levels.
The TC74ACT280 is composed of nine data inputs (A thru I)
and odd/even parity outputs (Σ ODD and Σ EVEN).
The odd parity output is high when an odd number of data
inputs are high. The even parity output is high when an even
number of data inputs are high.
The word-length capability is easily expanded by cascading.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
High speed: tpd = 9.2 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 8 μA (max) at Ta = 25°C
Compatible with TTL outputs: VIL = 0.8 V (max)
VIH = 2.0 V (min)
Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
Capability of driving 50
transmission lines.
Balanced propagation delays: tpLH ∼− tpHL
Pin and function compatible with 74F280
Pin Assignment
TC74ACT280P
TC74ACT280F
Weight
DIP14-P-300-2.54
SOP14-P-300-1.27A
: 0.96 g (typ.)
: 0.18 g (typ.)
NC: No connection
Start of commercial production
1989-11
1
2014-03-01


Toshiba Electronic Components Datasheet

TC74ACT280F Datasheet

9-Bit Parity Generator/Checker

No Preview Available !

IEC Logic Symbol
TC74ACT280P/F
Truth Table
Number of Inputs A Through I
Outputs
That are High
Σ EVEN Σ ODD
0, 2, 4, 6, 8
H
L
1, 3, 5, 7, 9
L
H
2
2014-03-01


Part Number TC74ACT280F
Description 9-Bit Parity Generator/Checker
Maker Toshiba
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TC74ACT280F Datasheet PDF






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