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TC74HC109AP Datasheet Dual J-K Flip-Flop

Manufacturer: Toshiba

Download the TC74HC109AP datasheet PDF. This datasheet also includes the TC74HC109 variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (TC74HC109_Toshiba.pdf) that lists specifications for multiple related part numbers.

Overview

TC74HC109AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC109AP, TC74HC109AF Dual J-K Flip-Flop with Preset and Clear The TC74HC109A is a high speed CMOS J- K FLIP FLOP fabricated with silicon gate C2MOS technology.

It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

In accordance with the logic levels applied to the J and K inputs, the outputs change state on the positive going transition of the clock pulse.

Key Features

  • High speed: fmax = 63 MHz (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 2 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Output drive capability: 10 LSTTL loads.
  • Symmetrical output impedance: |IOH| = IOL = 4 mA (min).
  • Balanced p.

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