TC74HC4520AP Overview
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Since it contains two independent counter circuits in one package, counting or frequency division of eight binary bits can be achieved with one device. The counter is reset to “O” (Q0 to Q3 low) by setting the CLR input high regardless of the other inputs.
TC74HC4520AP Key Features
- High speed: fmax = 55 MHz (typ.) at VCC = 5 V
- Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
- High noise immunity: VNIH = VNIL = 28% VCC (min)
- Outputs drive capability: 10 LSTTL loads
- Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
- Balanced propagation delays: tpLH ∼- tpHL
- Wide operating voltage range: VCC (opr) = 2 to 6 V
- Pin and function patible with TC4520B