Datasheet4U Logo Datasheet4U.com

TC74VCX541FK - Low-Voltage Octal Bus Buffer

Description

2.

The TC74VCX541FK is a high performance CMOS octal bus buffer which is guaranteed to operate from 1.2 V to 3.6 V.

Features

  • (1) Low-voltage operation: VCC = 1.2 to 3.6 V (2) High-speed operation: tpd = 3.5 ns (max) (VCC = 3.0 to 3.6 V) tpd = 4.2 ns (max) (VCC = 2.3 to 2.7 V) tpd = 8.4 ns (max) (VCC = 1.65 to 1.95 V) tpd = 16.8 ns (max) (VCC = 1.4 to 1.6 V) tpd = 42.0 ns (max) (VCC = 1.2 V) (3) Output current: IOH/IOL = ±24 mA (min) (VCC = 3.0 V) IOH/IOL = ±18 mA (min) (VCC = 2.3 V) IOH/IOL = ±6 mA (min) (VCC = 1.65 V) IOH/IOL = ±2 mA (min) (VCC = 1.4 V) (4) Latch-up performance: -300 mA (5) ESD performance: Human Bod.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
TC74VCX2125FK Low-Voltage Quad Bus Buffer Toshiba Semiconductor
TC74VCX2573FK Low-Voltage Octal D-Type Latch Toshiba Semiconductor
TC74VCX2573FT Low-Voltage Octal D-Type Latch Toshiba Semiconductor
TC74VHC03F Quad 2-Input NAND Gate Toshiba Semiconductor
TC74VHC03FK Quad 2-Input NAND Gate Toshiba Semiconductor

Other Datasheets by Toshiba

Part Number Description
TC74VCX541FT Low-Voltage Octal Bus Buffer
TC74VCX573FK Low-Voltage Octal D-Type Latch
TC74VCX573FT Low-Voltage Octal D-Type Latch
TC74VCX574FK Low-Voltage Octal D-Type Flip-Flop
TC74VCX574FT Low-Voltage Octal D-Type Flip-Flop

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CMOS Digital Integrated Circuits Silicon Monolithic TC74VCX541FK TC74VCX541FK 1. Functional Description • Low-Voltage Octal Bus Buffer with 3.6-V Tolerant Inputs and Outputs 2. General The TC74VCX541FK is a high performance CMOS octal bus buffer which is guaranteed to operate from 1.2 V to 3.6 V. Designed for use in 1.5 V, 1.8 V, 2.5 V or 3.3 V systems, it achieves high speed operation while maintaing the CMOS low power dissipation. It is also designed with over voltage tolerant inputs and outputs up to 3.6 V. The device is a non-inverting 3-state buffer having two active-low output enables. When either OE1 or OE2 are high, the terminal outputs are in the high-impedance state. This device is designed to be used with 3-state memory address drivers, etc.
Published: |