TC74VCX573FK Datasheet | Toshiba

TC74VCX573FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VCX573FT, TC74VCX573FK Low-Voltage Octal D-Type Latch with 3.6 V Tolerant Inputs and Outputs The TC74VCX573 is a high performance CMOS octal D-type latch which is guaranteed to operate from 1.2-V to 3.6-V. Designed for use in 1.5V, 1.8 V, 2.5 V or 3.3 V systems, it achieves high speed operation while maintaining the CMOS low power dissipation. It is also designed with over voltage tolerant inputs and outputs up to 3.6 V. This 8 bit D-type latch is controlled by a latch enable input (LE) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state. All inputs are equipped with protection circuits against static discharge. Features - Low voltage operation: VCC = 1.2 to 3.6 V - High speed operation: tpd = 4.2 ns (max) (VCC = 3.0 to 3.6 V) tpd = 4.7 ns (max) (VCC = 2.3 to 2.7 V) tpd = 9.4 ns (max) (VCC = 1.65 to 1.95 V) tpd = 18.8 ns (max) (VCC = 1.4 to 1.6 V) tpd = 47.0 ns (max) (VCC = 1.2 V) - 3.6 V tolerant inputs and outputs. - Output current: IOH/IOL = ±24 mA (min) (VCC = 3.0 V) IOH/IOL = ±18 mA (min) (VCC = 2.3 V) IOH/IOL = ±6 mA (min) (VCC = 1.65 V) IOH/IOL = ±2 mA (min) (VCC = 1.4 V) - Latch-up performance: - 300 mA - ESD performance: Machine model ≥ ±200 V Human body model ≥ ±2000 V - Package: TSSOP and VSSOP (US) - Power down protection is provided on all inputs and outputs. TC74VCX573FT Weight TSSOP20-P-0044-0.65A VSSOP20-P-0030-0.50 : 0.08 g (typ.) : 0.03 g (typ.) Start of mercial production 1998-06 1 2014-03-01 Pin Assignment (top view) OE 1 D0 2 D1 3 D2 4 D3 5 D4 6 D5 7 D6 8 D7 9 GND 10 20 VCC 19 Q0 18 Q1 17 Q2 16 Q3 15 Q4 14 Q5 13 Q6 12 Q7 11 LE TC74VCX573FT/FK...