TC74VHC132FT - QUAD 2-INPUT SCHMITT NAND GATE

Toshiba

Datasheet Details

High speed: tpd = 4.9 ns (typ. ) at VCC = 5 V.
Low power dissipation: ICC = 2 µA (max) at Ta = 25°C.
Power down protection is provided on all inputs.
Balanced propagation delays: tpLH ∼.
tpHL.
Wide operating voltage range: VCC (opr) = 2 to 5.5 V.
Low noise: VOLP = 0.8 V (max).
Pin and function compatible with 74ALS132 Note: xxxFN (JEDEC SOP) is not available in Japan. TC74VHC132F TC74VHC132FN TC74VHC132FT TC74VHC132FK We.

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