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TC74VHC138FK Key Features

  • High speed: tpd = 5.7 ns (typ.) at VCC = 5 V
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
  • High noise immunity: VNIH = VNIL = 28% VCC (min)
  • Power down protection is provided on all inputs
  • Balanced propagation delays: tpLH ∼- tpHL
  • Wide operating voltage range: VCC (opr) = 2 V to 5.5 V
  • Pin and function patible with 74ALS138

TC74VHC138FK Description

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 Binary Select inputs (A, B and C) determine which one of the outputs ( Y0 - Y7 ) will go low. When enable input G1 is held low or either G2A or G2B is held high, decoding function is inhibited and all outputs go high.