TC74VHC912FK Overview
The TC74VHC9125/9126 bines low power consumption of CMOS with Schottky TTL speeds. Y1 to Y4 outputs can be put in the high-impedance state by placing a logic HIGH on the Enable ( G ) input. The CONT input determines the logical inversion of data.
TC74VHC912FK Key Features
- High speed: tpd = 5.0 ns (typ.) (VCC = 5 V)
- Low supply current: ICC = 2 µA (max) (Ta = 25°C)
- All inputs are provided with power-down protection
- Symmetrical rise and fall delays: tpLH ∼- tpHL
- Wide operating voltage range: VCC (opr) = 2 to 5.5 V