Absolute Maximum Ratings (Ta = 25°C)
Differential input voltage
±3.5 or 7
VSS to VDD
−40 to 85
−55 to 125
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant
change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating
conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling
Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated
failure rate, etc).
Note: This device’s CMOS structure makes it prone to latch-up. To prevent latch-up, please take the following precautions:
• Ensure that no I/O pin’s voltage level ever exceeds VDD or drops below VSS.
In addition, check the power-on timing.
• Do not subject the device to excessive noise.
Toshiba Electronic Devices & Storage Corporation