5. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25 )
±3.0 or 6.0
Differential input voltage
VSS to VDD
PD (Note 1)
-40 to 85
-55 to 125
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note: Since this device is susceptible to latch-up, a phenomenon inherent to CMOS devices, follow these
- Don't raise the voltage level of the output pins above VDD or lower it below VSS.
Consider the power-on timing as well.
- Ensure that any abnormal noise is not introduced into the device.
Note 1: Mounted on an FR4 board.
6. Operating Ratings (Unless otherwise specified, Ta = 25 )
1.3 to 5.5
±0.65 to ±2.75