• Part: TMPM365FYXBG
  • Description: 32-bit RISC Microprocessor
  • Manufacturer: Toshiba
  • Size: 7.71 MB
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Toshiba
TMPM365FYXBG
TMPM365FYXBG is 32-bit RISC Microprocessor manufactured by Toshiba.
Description When the multi-master function is used in I2C bus mode, if these masters start the munications simultaneously, the following phenomena may occur: 1. munications may be locked up. 2. SCL pulse widths shorten; therefore these pulses may not satisfy I2C Specifications. 1.2 Condition These phenomena occur only when the multi-master function is used in I2C bus mode. If a single master is used, these phenomena do not occur. 1.3 Workaround There is no workaround for these phenomena. Perform recovery process by software. 1.4 How to Recover from These Phenomena Perform recovery process by software. By using a timer, add timeout process to check whether munication is in a lock-up state. An example of recovery process: 1. Start a timer count synchronously with start of the transmission. 2. If a serial interface interrupt (INTSBIx) does not occur in a certain period, the MCU determines the timeout. 3. If the MCU determines the timeout, munications may be locked up. Perform software reset on the serial bus interface circuit. This circuit is initialized to release munication from the lock up state. 4. Resend transmission data. Mostly, Process 1 to 4 are enough to recovery; however if the multiple products are connected to the same bus line, add a delay time between each product's recovery process before Process 4 (resending data) is performed. This delay makes a time difference between each master; therefore bus collision can be avoided when the data is sent again. 2015/1 Important Notices Example: Recovery process after a timeout is detected. Timeout Perform software reset Am I master No device? i = Self ID×10 (- optional) Software timer No (--i) == 0 ? Bus is free? No Other device established munication. munication starts Back to the main routine 2015/1 2 Transitions to Low-power Consumption Mode and Generating a Nonmaskable Interrupt This chapter describes the precautions at which non-maskable interrupt (NMI) occurs when...